Low Power High Level Synthesis for Nanoscale CMOS Circuits

This self-contained book addresses the need for analysis, characterization, estimation, and optimization of the various forms of power dissipation in the presence of process variations of nano-CMOS technologies.

Low Power High Level Synthesis for Nanoscale CMOS Circuits

Author: Saraju P. Mohanty

Publisher: Springer Science & Business Media

ISBN: 0387764747

Page: 302

View: 780

This self-contained book addresses the need for analysis, characterization, estimation, and optimization of the various forms of power dissipation in the presence of process variations of nano-CMOS technologies. The authors show very large-scale integration (VLSI) researchers and engineers how to minimize the different types of power consumption of digital circuits. The material deals primarily with high-level (architectural or behavioral) energy dissipation.

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